The electronics industry has experienced an ever increasing demand for smaller and faster electronic devices which are simultaneously able to support a greater number of increasingly complex and sophisticated functions. Accordingly, there is a continuing trend in the semiconductor industry to manufacture low-cost, high-performance, and low-power integrated circuits (ICs). Thus far these goals have been achieved in large part by scaling down semiconductor IC dimensions (e.g., minimum feature size) and thereby improving production efficiency and lowering associated costs. However, such scaling has also introduced increased complexity to the semiconductor manufacturing process. Thus, the realization of continued advances in semiconductor ICs and devices calls for similar advances in semiconductor manufacturing processes and technology.
Graphene, a two-dimensional (2-D) sheet of carbon atoms bonded to one another in a hexagonal crystal lattice, has recently been introduced as a potential replacement channel material for transistor devices. In addition to its high intrinsic mobility, graphene has attracted great interest for its other unique properties such as large current densities, thermodynamic and mechanical stability, and high saturation velocity, among others. Large-area graphene films have been produced by a variety of methods such as epitaxial growth on silicon carbide (SiC) substrates, chemical vapor deposition (CVD)-growth (e.g., involving the catalyzed decomposition of hydrocarbons on a metal surface), and mechanical exfoliation (e.g., from a bulk graphite source), among others. By way of example, the fabrication of graphene-based devices generally involves transfer of a graphene layer (e.g., from a growth substrate or from the bulk graphite source), and onto a target substrate upon which the graphene-based device will be fabricated. As a result of the transfer process, grain boundaries, point defects, wrinkles, folds, tears, or other lattice imperfections may be introduced into the transferred graphene layer and thereby detrimentally affect the properties of any subsequently fabricated devices. Additionally, charged impurities adsorbed to and/or within the target substrate may cause unintentional doping of the transferred graphene layer (e.g., due to charge transfer doping) and thereby affect the quality and/or performance of subsequently fabricated graphene-based devices. Thus, existing techniques have not proved entirely satisfactory in all respects.